Fetch-Decode-Execute Cycle

What Is It?

The Fetch-Decode-Execute (FDE) Cycle is the fundamental operating process of the CPU. It repeats continuously while the computer is on, processing one instruction at a time.

A computer is a device that takes input, processes it according to a program, and produces output. The CPU carries out the processing via the FDE cycle.


The Three Stages

1. Fetch

The CPU retrieves the next instruction from memory.

  1. The address held in the PC (Program Counter) is copied to the MAR
  2. The address travels along the Address Bus to RAM
  3. The instruction at that address is retrieved and placed in the MDR via the Data Bus
  4. The PC is incremented to point to the next instruction
  5. The instruction is copied from the MDR to the Current Instruction Register (CIR) for decoding

2. Decode

The Control Unit (CU) interprets the instruction in the CIR, determining what operation must be carried out.

3. Execute

The instruction is carried out:

  • If it involves a calculation, the ALU performs it and stores the result in the ACC
  • If it involves memory access, data is read from or written to RAM
  • If it involves input/output, the appropriate device is addressed

Cycle Diagram

        ┌────────────────────────────────────────┐
        │                                        │
        ▼                                        │
   ┌─────────┐     ┌──────────┐     ┌──────────┐│
   │  FETCH  │────▶│  DECODE  │────▶│ EXECUTE  ││
   │(PC→MAR) │     │  (CU)    │     │(ALU/I-O) ││
   └─────────┘     └──────────┘     └──────────┘│
        │  PC incremented after fetch            │
        └────────────────────────────────────────┘

Clock Speed

  • Every stage of the FDE cycle is synchronised by the CPU clock
  • Clock speed = number of FDE cycles completed per second
  • Measured in Hertz (Hz), modern CPUs run at billions of Hz (GHz)
  • 1 Hz = 1 cycle per second
  • Faster clock = more instructions per second = faster computer

Key Registers Used

RegisterRole in FDE
PCHolds address of the next instruction
MARReceives address from PC for memory access
MDRReceives instruction/data from RAM
ACCStores results of ALU operations

See CPU Registers for full detail.


Exam Questions

Q: List the three stages of the FDE cycle.

Fetch, retrieve the instruction from the memory address in the PC. Decode, the CU interprets the instruction. Execute, carry out the instruction (e.g., ALU calculates, result stored in ACC).

Q: What does the Program Counter do after the fetch stage?

It is incremented to hold the address of the next instruction.

Q: What does clock speed measure?

How many fetch-execute cycles the CPU can complete per second, measured in Hertz (Hz).


Exam Tip

Know the sequence of registers used in the fetch stage: PC → MAR → (address bus) → RAM → (data bus) → MDR. This is a common 4-6 mark question.